1. Field of the Invention
The present invention relates to a liquid crystal device, and more particularly, to an LCD (Liquid Crystal Display) driving circuit, in which dot inversion type source driving is implemented by using one type of DAC.
2. Background of the Related Art
A related art LCD controls a light transmittivity of LCD cells on an LCD panel for displaying a picture relevant to a video signal. For driving the LCD cell on the LCD panel, one of driving systems selected from a frame inversion system, a line inversion system, and a dot inversion system is used. In the frame inversion system, a polarity of a data signal supplied to each of the LCD cells on the LCD panel is inverted every time a frame is changed. In the line inversion, a polarity of the data signal supplied to the LCD cells along gate lines, i.e, lines on the panel is inverted. In the dot inversion, data signals of polarities opposite to adjacent cells are supplied to cells both on gate lines and data lines, and polarities of the data signals supplied to all the LCD cells are inverted whenever frames are changed. In other words, the data signals are supplied to the LCD cells on the LCD panel such that a positive polarity “+” (high voltage) and a negative polarity “−” (low voltage) are displayed alternately as it goes from an LCD at left top side to LCD cells in a right direction, and low direction when video signals of an odd numbered frame is displayed. Opposite to this, the data signals are supplied to the LCD cells on the LCD panel such that a positive polarity “+” and a negative polarity “−” are displayed alternately as it goes from an LCD at left top side to LCD cells in a right direction, and low direction when video signals of an even numbered frame is displayed. Of those three LCD panel driving systems, the dot inversion system can provide a picture of an excellent picture quality as data signals of polarities opposite to the data signals supplied to adjacent LCD cells in the vertical and horizontal directions respectively can be provided to any desired LCD cells. Owing to this merit, currently, LCD driving of the dot inversion system is used mostly. There are cases when a particular pattern, such as check pattern, sub-pixel pattern, windows shutdown mode pattern, or the like is required to be displayed in the dot inversion type LCD system. In this instance, in the dot inversion type LCD panel driving system, there may be flicker on the picture displayed in the dot inversion type LCD panel driving system caused by frame inversion effect.
A related art LCD will be explained with reference to the attached drawings. FIG. 1 illustrates a driving circuit of a related art LCD. For driving the dot inversion system employed for preventing hardening of liquid crystal in the related art, both a high voltage DAC (Digital to Analog Converter) and a low voltage DAC are used, which occupy most of a driver IC area. Specifically, FIG. 1 illustrate a structure of a source driver IC suggested by Vivid Semiconductor, Inc., (U.S. Pat. No. 5,754,156). In order to reduce the DAC area, one pair of channels of the high voltage DAC and the low voltage DAC are provided, with one channel for a P decoder, and the other channel for N decoder, for driving the LCD by using both the P decoder and the N decoder once, and other type of decoder on the other channel, i.e., only one channel and one type of decoder by using a multiplexer at the next time. That is, as shown in FIG. 1, the DAC on first channel 11 is a block for converting a high voltage area, and the DAC on the second channel 12 is a block for converting a low voltage area. Thus, the pixel driving by the dot inversion system using a multiplexer can reduce DAC on channels by half.
However, the source driver in the related art LCD has the following problems.
The alternate arrangement of high voltage DAC and the low voltage DAC on each channel requires two times of reference voltages, that in turn makes to requires blocks for generating the high reference voltage and the low reference voltage respectively, thereby limiting reduction of a chip size.